SUNY

Department of Electrical and Computer Engineering
State University of New York - New Paltz

Baback A. Izadi, Ph.D.

Email: bai@engr.newpaltz.edu
Phone: (845) 257 - 3823
FAX : (845) 257 - 3730

Course Title: Digital Logic Lab
Course Number: EGC208
Credit: 3
Prerequisite: EGC230
home
office hours
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useful links

Spring 2009

Meeting Days: Friday
Meeting Time: 9:25 AM- 12:05 PM
Meeting Room: WSB105

Syllabus

Teaching Assistant

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Lab report template

Lab Assignments

Lab number
Title
Due date
1
Design of a full adder
2/6/09
2
Design of a clock using Electronic Workbench
2/20/09
3
Up/Down counter with a given sequence
3/6/09
4
Design of a four-bit ALU using Xilinx
4/3/09
5
Design of a vending machine using Xilinx
4/15/09
6
VHDL implementation of a four-bit ALU using Xilinx
5/1/09

Oral Project Presentation:

Tutorials:

Bullet Xilinx ISE Tutorial
Bullet Tutorial (to simulate and verify the design)
Bullet Tutorial to Download to Digilab II Board
Bullet Xilinx State Editor Tutorial
Bullet ModelSim Tutorial
Bullet Tutorial on Sequential Logic Design

 

Relevant Web Sites

Bullet Digital Logic Fundamentals
Bullet Digital logic tutorial
Bullet Combinational Logic Tutorial
Bullet Latches and Flip flops
Bullet Xilinx:     http://www.xilinx.com/programs/xds1.htm
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Texas Instruments Digital Logic Families

Bullet Go here if you need software to view and print Postscript files
Bullet Go here if you need software to view and print PDF files under Windows
Bullet Biography of George Boole
Bullet To download a demo version of  Electronic Workbench click on http://www.interactiv.com/html/demo.html
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Tutorial on ISE at
http://www.xilinx.com/support/training/north-america-home-page.htm

 

Handouts

bullet Some basic hints and suggestion on breadboarding
bullet Detail of Digilab boards
bullet Digital Symbols (you may download it for your lab reports and homeworks)

Last updated on Friday, January 23, 2009 3:43 PM