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Division of Engineering Programs
Dr. Baback Izadi

 

Email: bai@engr.newpaltz.edu
Phone: (845) 257 - 3823
FAX : (845) 257 - 3730

Digital Logic Lab
Course Number: EGC221
Credit: 1
Co-requisite: EGC220

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Spring 2023

Meeting Days: Wednesday
Meeting Time: 11:00 PM- 1:50 PM
Meeting Room: WH221

Syllabus

Tools for the lab : https://www.amazon.com/hz/wishlist/ls/9V3L6M0OLFJ2/ref=hz_ls_biz_ex

Teaching Assistant

Bullet

Michael DiNardi 

dinardim1@newpaltz.edu



Lab report template

Lab number
Title
Due date
Class Notes
1
Basic Logic Gate Simulation (Word) (PDF)
2/8/2023 Lecture Notes 2/1/2023
2
Basic Logic Gate Physical Verification (Word) (PDF)
2/15/2023 Lecture Notes 2/8/2023
3
Combinational Logic Circuits (Word) (PDF)
2/22/2023 Lecture Notes 2/15/2023
4
Combinational Logic Circuit Reduction (Word) (PDF)
3/1/2023 Lecture Notes 2/22/2023
5

Arithmetic Circuits Using Intel Quartus Pime (Word) (PDF) (Design of an Adder/Subtractor)

3/22/2023 Lecture Notes 3/1/2023
6
Hierarchical Logic Design Using Intel Quartus Prime (Word) (PDF)
3/29/2023  Lecture Notes 3/22/2023
7
Arithmetic Logic Unit (ALU) Schematic Implementation (Word) (PDF)
4/19/2023  Lecture Notes 3/29/2023
8

Arithmetic Logic Unit (ALU) Verilog Implementation (Word) (PDF)

4/26/2023 Lecture Notes 4/19/2023
9

Sequential Design Using Verilog (Word) (PDF)

5/3/2023 Lecture Notes 4/26/2023

Oral Lab Presentation: 5/10/2023

Tutorials:

BulletInstalling Quartus Prime and Model Sim on your home computer
BulletYouTube Quartus Prime Tutorial Schematic Capture
BulletYoutube Quartus Prime Tutorial Creating a Waveform Simulation
BulletYouTube Quartus Prime Tutorial Verilog and Pin Assignment
BulletTutorial on Quartus Prime Schematic Capture
BulletDE10 Lite User Manual
BulletDE10 Lite and Quartus Set UP
BulletHow to Connect to Campus Classroom Computers Remotely
BulletTutorial on Quartus II Schematic Capture
BulletTutorial on Quartus II Verilog
BulletTutorial on using DE-series boards

BulletDE-series boards manual

BulletPin assignment for DE-series boards
BulletTutorial on Verilog I
BulletTutorial on Verilog II
BulletYoutube Quartus II Tutorial Designing a simple Circuit
BulletYoutube Creating a Waveform Simulation for Altera Quartus
BulletYoutube Quartus II Tutorial
 
 
 
 

Relevant Web Sites

Bullet Digital Logic Fundamentals
Bullet Digital logic tutorial
Bullet Combinational Logic Tutorial
Bullet Latches and Flip flops
Bullet Texas Instruments Digital Logic Families
Bullet

To download a free version of  LogiSim click onhttps://logisim.en.uptodown.com/windows

Bullet Biography of George Boole
Bullet  
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Handouts

bullet

Download Quartus 15.0.0.145 Web Edition

bullet Running Quartus using Virtual Desktop on New Paltz workstations
bullet Some basic hints and suggestion on breadboarding
bullet General Guideline to Final Lab Presentation
bullet General Presentation Guidelines
bullet Digital Symbols (you may download it for your lab reports and homeworks)
   

Last updated on Thursday, April 20, 2023 4:43 PM